This application is based on Japanese Patent Application HEI 11-211118, filed on Jul. 26, 1999, the entire contents of which are incorporated herein by reference.
a) Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a semiconductor device in which an amount of carriers moving in a carrier transit layer made of group III-V compound semiconductor is controlled by voltage applied to the gate electrode.
b) Description of the Related Art
With recent demands for high speed and high performance of a computer system and a communication system, developments are progressing on a high electron mobility transistor (HEMT) using group III-V compound semiconductor.
A conventional HEMT of InP series will be described below. An InP HEMT uses an InP substrate, and InGaAs as its electron transit layer, and n-type InAlAs as its electron supply layer. On the electron supply layer, a contact layer of n-type InGaAs is formed. A gate electrode is in Schotky contact with the supply layer. Source and drain electrodes are in ohmic contact with the contact layer. Between the gate electrode and n-type InAlAs electron supply layer, an undoped InAlAs layer is inserted in some cases in order to reduce gate leak current.
An InP layer is inserted in some cases between the n-type InGaAs contact layer and undoped InAlAs layer in order to precisely control the threshold voltage. InP has resistance to chemical etching different from InAlAs and InGaAs. With this structure, it is possible to remove the n-type InGaAs contact layer in the gate contact area with good controllability and expose the underlying InP layer and undoped InAlAs layer. The gate electrode contacts the exposed InP layer or undoped InAlAs layer.
A threshold voltage may decrease after the long-term operation of an InP HEMT.
It is an object of the present invention to reduce a change in the threshold voltage and improve reliability of a field effect transistor having a group III-V compound semiconductor which contains In.
According to one aspect of the present invention, there is provided a semiconductor device comprising: a semiconductor substrate; a carrier transit layer including group III-V compound semiconductor and formed on said semiconductor substrate; a carrier supply layer including group III-V compound semiconductor containing In as group III element and formed on said carrier transit layer, said carrier supply layer supplying carriers for generating two-dimensional carrier gas in an interface between said carrier supply layer and said carrier transit layer; a gate electrode disposed above a partial area of said carrier supply layer for controlling a potential in said carrier transit layer; an intermediate layer disposed between said gate electrode and said carrier supply layer and including group III-V compound semiconductor not containing In as group III element; and a pair of ohmic electrodes disposed on both sides of said gate electrode for flowing current through said carrier transit layer.
Since the intermediate layer not containing In is inserted between the gate electrode and carrier supply layer, the gate electrode will not contact an In containing semiconductor layer. Accordingly, it is possible to prevent a change in the threshold voltage to be caused by instability of an interface between the gate electrode and In containing semiconductor layer.